Cheat Sheet
The commands you keep forgetting, with a one-line description and a real example you can copy - 629 across 38 tools. Pick a tool in the sidebar, or search across all of them.
make (Makefiles)
Run project tasks with make - targets, variables, and the Makefile patterns that recur.| Command | What it does | Example |
|---|---|---|
make | Run the first target in the Makefile. | make |
make <target> | Run a specific target. | make build |
rule anatomy | target: prerequisites, then TAB-indented commands. | build: main.c
gcc -o app main.c |
.PHONY | Mark targets that aren't files, so they always run. | .PHONY: clean test deploy |
variables | Define once at the top, reuse below. | CC = gcc
CFLAGS = -Wall -O2 |
$(VAR) | Expand a variable inside a recipe. | $(CC) $(CFLAGS) -o app main.c |
make VAR=value | Override a variable from the command line. | make deploy ENV=staging |
chained targets | A target can simply depend on other targets. | ci: lint test build |
make -j | Run independent jobs in parallel. | make -j8 |
make -n | Dry run - print commands without running them. | make -n deploy |
make -C | Run make in another directory. | make -C platform build |
make -B | Force a rebuild even if everything is up to date. | make -B build |
$@ and $< | Automatic variables: target and first prerequisite. | %.o: %.c
$(CC) -c $< -o $@ |
@ prefix | Silence a command (don't echo it). | @echo "Deploying to $(ENV)" |
ifeq | Branch on a variable's value (no tab before ifeq lines). | ifeq ($(ENV),prod)
FLAGS = --minify
endif |